Search Results for "65816 reference"

65816 Reference - Internal Registers, Addressing Modes, Instructions, Datasheets, Manuals etc.

BS-X BIOS Functions

Properties & Technical capabilities of each of the 8 background modes

order in which objects and backgrounds are drawn by the PPU

The SNES has 8 background modes, two of which have major variations. The modes are selected by bits 0-2 of register $2105.

Mode    # Colors for BG
         1   2   3   4
======---=---=---=---=
0        4   4   4   4
1       16  16   4   -
2       16  16   -   -
3      256  16   -   -
4      256   4   -   -
5       16   4   -   -
6       16   - 

BRR, or Bit Rate Reduction, is the sound encoding scheme used by the SPC700, the sound chip in the SNES.

Ascii pinout of the CIC chip

A DSP chip from Capcom; it is actually a Hitachi HG51B169 as confirmed by decapping. There are 1024K words of 24-bit instructions, running as 20.000MHz. and it is used in 2 games:

• Mega Man X 2 / Rockman X 2
• Mega Man X 3 / [Rockman X 3](http://superfamicom.org/ ...

SNES Controllers

Information on DMA and HDMA

SNES Expansion Chips

Describes how each of the nvmxdizc flags change when different instructions run.

Describes how state of flags and special registers changes what different instructions do

Bung Game Doctor SF3, SF6, SF7 Headers

Version 1.0 - Copyright 2003: The Dumper

The Game Doctor SF3/SF6/SF7 backup units for the SNES use a 512 byte header.

The format is as follows (all numbers are hexadecimal):

0000-000F

47 41 4D 45 20 44 4F 43 54 4F 52 20 53 46 20 33 "GAME DOCTOR SF 3"

This is the ID string for a Game Doctor SF header.

0010

SRA ...

List of write- and read-twice registers

HiROM/LoROM differences

Describes the SNES memory map.

Old BBS Messages related to SNES or Programming

The theory is that the S-CPU chip has something called a "Memory Data Register" or MDR, which stores the value for every read/write. When you attempt to read from unmapped memory, no new value is supplied for this register and so you read the same old value over and over.

Note that CPU IO cycles do not affect the MDR (and therefore the Open Bus value), even though the datasheet specifies addres ...

All about the PHP instruction

The Super Nintendo / Super Famicom stores its palette in 512 bytes in a 15-bit BGR format.

a

Primary Group Instructions for the 65816

Table of the differences between the 65816's registers

SNES Memory Mapped I/O Registers

Rendering the Screen: Mosaic, Color Math

The SA-1 is a coprocessor capable of running at four times the base speed of the SNES main CPU when access does not conflict with that of SNES CPU, DMA or HDMA processing. It provides additional shared RAM, visible to both the SNES CPU and the SA-1, and optionally backed up by battery referred to as BW-RAM with a maximum install RAM size of 256 KB (2 Mbit).

SA-1 Co-Processor Registers

List of SNES / SFC development PCB boards IDs.

SPC is an audio format for playing native SNES audio.

SPC700 Audio Processor Reference

SPC7110 Decompression Chip

The ST-0010 is a DSP chip from Seta; it is actually a NEC uPD96050, as confirmed by decapping. It's only used, and barely so, in 1 game:

• Exhaust Heat 2 - F1 Driver he no Kiseki

The development PCB for this chip has the serial SETA ESP-0019C SHVC PCB and the following chips:

DSP            Crystal
=========

This is a document intended to describe the various hardware ports on the SNES.

The SNES has 128 independent sprites. The sprite definitions are stored in Object Attribute Memory, or OAM.

Community eratta for the offical documentation from Nintendo

Hardware Specification to SWC & SMC Programmer Only

1. DRAM - 28 Mega Bits Maximum Available.
2. SRAM - 256K Bits. (Battery Backup)
3. ROM - 128K Bits. (Firmware)
4. Floppy Drive Interface

• Motorola MCS3201 Chip. (NEC 765a Compatible)
• Compatible With IBM PC/at and XT Disk Drive System.
• Supports 3.5" or 5.25" Floppy Disk Drive.
• Db-25 Female Connector. (Non-Standar ...

SuperDisc Memory Map

Once you've programmed a game or other bit of data for SNES, you'll probably want to try to, well, test it.

Methods

Although for most software these choices are, mostly, about preference. Most games which require Expansion Chips other than the DSP-1 may require less than favorable methods of testing (either emulation or reproduction cartridge).

Emulators

...

width of tile in VRAM words

This is a document intended to describe various aspects of SNES timing. It will probably not be useful unless you already know a good bit about the SNES.

Super Flash Cart 64M for NTSC/PAL SNES

The Super Flash Cart 64M (SFC) is an 8MB SNES cartridge with flash memory and battery RAM. It comes with a separate programmer. I obtained the following information by hot-swapping the cartridge into an already-powered SNES running probing programs, and making minor modifications to its mapping scheme.

Memory Mapping

The SNES has a 24-bit a ...

How transparency works on the SNES.

Useful Ruby Snippets

WRAM ascii pinout

Widespread Programming Myths, These are myths that frequently show up that mislead people into writing bad code based on false perception of what the system actually does.

The windows can be used to mask off a portion of any BG on the scanline.

XBA - Exchanges B with A

Description

XBA swaps the values of the two 8-bit accumulators A and B. It should be noted that A and B don't swap position - it's only their values that exchange. If they swapped positions that would add a lot of confusion.

Extended Notes

It bears repeating that the 65c816 does not ...

h

xkas (acronym for: cross-knight assembler) is a cross-assembler for the WDC G65816 processor, specifically tailored for use with SFC/SNES programming and translations but also supports GBA Thumb CPU (ARM7TDMI Thumb). The documentation below is for the most recent version of xkas.

Features

• Supports All 256 Opcodes
• Supports Labels / Sublabels / +/- Labels
• Supports Math
• Supports ASC ...