In this tutorial, you'll learn to read the joypad registers and react to player input ;). We're going to need to store the player's input somewhere, so we'll declare some variables in the system's RAM (
$0000-$1FFF). If you make your own variables later in this part of RAM, keep in mind that the stack is set to
$1FFF, so try not to get too close to that area (of course). We'll define variables ...
SA-1 Co-Processor Registers
Address Bus B Registers
TODO: note on fast access time
|Screen Display Register||
|Object Size and ...|
When you have finished this tutorial, you will have written a small game. Things you have to know before you start:
- 65816 assembly
- Interrupts (What are NMI and VBlank)
- What is VRAM, CGRAM, and their basic structures
- What is DMA and how to use it
- Video modes (mode 0), using backgrounds
- How to get information on player input
- Optional: Using 16x16 tiles
If you have problems ...
Soundlink, also known as "Live Voice" and various other aliases, is a Satellaview function in which Streaming Satellite Radio from St.GIGA is played at the same time as software data is broadcast, downloaded and played. This is intended to give the illusion of a game being played with high-quality audio. This was a selling feature of the Satellaview and was used in a lot of it's software.
Satellaview AV Selector
The satellaview AV selector was conceived in order to prepare the decoded satellite signal for the satellaview, prevent the super famicom from monopolizing the TV's AV input, and allow for the use of a second BS decoder along with the one provided by ST. Giga. As is evident in the following diagram, the selector's internal circuit can be divided in three discrete units, ...
Introduction to DMA
Most computer systems have some form of Direct Memory Access controller, which is basically a piece of hardware that allows I/O devices to copy to and from main memory independently of CPU control. In the SNES, as usual, Nintendo came up with an odd design for their DMA system. There are 8 DMA "channels", each of which can control a separate transfer from CPU memory t ...