A list of open problems in how the SNES works:
- What exactly happens in the DMA crash bug on the v1 CPU?
- What is the exact timing for the garbage that appears on the screen when switching modes mid-frame?
- How is the sprite data cached for each scanline and is there a way to abuse the timing to inject data into OAM midframe?
- Are there any unexpected interactions with ExtBG that haven't been tested? For example I am not sure if anybody tried Direct color mode with ExtBG yet (probably won't work, but who knows)
rainwarror wrote a test ROM for direct color mode+EXTBG in 2022: https://forums.nesdev.org/viewtopic.php?t=24081
- What are the exact decay rates for the MDR?
- Emulating Coprocessor bus conflicts
- What about unused pins on the PPU, CPU, and APU -- Even though a game can't use them they are worth exploring IMO
https://sneslab.net/wiki/List_of_unconnected_pins
- can we predict the APU crosstalk 16 bit bug?
https://forums.nesdev.org/viewtopic.php?p=279491&hilit=APU+crosstalk#p279491
- What happens to the very first pixel on the scanline in Hi-res Math?
- Various PPU registers still need to know when writing to them is effective.
TODO: put list of PPU registers here
Most of these problems require access to a logic analyzer.
Discorded but not wiki'd by p4plus2