This document describes how the 65816's P flags and special registers affect what the different instructions do. I have excluded the state of the accumulator and index registers as they would make this document huge. I have abbreviated the words "addressing mode" as "admode." If only certain admodes apply, they are listed in parentheses. Because the names of some admodes have commas in them, semicolons delimit lists of admodes.

These instructions do not care at all about the previous state of any flags when they run, and always take the same number of cycles:

  • NOP
  • WDM (because the instruction set was never expanded)
  • XBA
  • STP
  • REP (note that SEP is not here beside it!)
  • BRL
  • CLC
  • CLI
  • CLD
  • CLV
  • INC (accumulator addressing mode)
  • INX
  • INY
  • DEX
  • DEY

This instruction forces the m and x flags to 1 if e is being set:

  • XCE

This instruction keeps waiting until an interrupt happens:

  • WAI

These instructions save the stack pointer to the stack but aren't affected by its value:

  • PEA
  • PEI

These instructions use the stack pointer to know where to go:

  • RTS
  • RTL

These instruction takes one extra cycle if the e flag is set:

  • BCC
  • BCS
  • BEQ
  • BNE
  • BMI
  • BPL
  • BVC
  • BVS
  • BRA

These instructions take one extra cycle if the e flag is clear:

  • BRK
  • COP
  • RTI

Note: I like to call the carry flag the borrow flag when doing subtraction - they different names for exactly the same flag

The sum is one greater if the carry flag is set:

  • ADC

The difference is one fewer if the borrow flag is clear:

  • SBC

The following instructions transfer only one byte if the m flag is set:

  • TXA
  • TYA

The following instructions take two extra cycles if the m flag is clear:

  • INC (absolute; direct page; absolute indexed, X; Direct Page Indexed, X)
  • DEC (Absolute; direct page; absolute Indexed, X; Direct Page Indexed, X)
  • ASL (Absolute; Direct page; Absolute Indexed, X; Direct Page Indexed, X)
  • TRB (both Direct Page and Aboslute addressing)
  • TSB (both Direct Page and Absolute addressing)

The following instructions take only one extra cycle if the m flag is clear:

  • LDA (all addressing modes)
  • ORA (all admodes)
  • STA (all admodes)
  • STZ (all admodes)
  • BIT (all admodes)
  • CMP (all admodes)
  • PLA
  • STZ (all admodes)

The following instructions take one extra cycle if the x flag is clear:

  • PLA
  • PLX
  • PLY
  • STX (all admodes)
  • STY (all admodes)
  • LDX (all admodes)
  • LDY (all admodes)

This instruction moves the value of the carry bit into bit 0 of the accumulator:

  • ROR

This instruction moves the value of the carry bit into the most significant bit of the accumulator:

  • ROL

These instruction set the high byte of the index registers to 0 when the x flag is set:

  • RTI
  • SEP