This (incomplete) document describes how the 65816's P flags and special registers/stack affect what the different instructions do. I have excluded the state of the accumulator and index registers as they would make this document huge. I have abbreviated the words "addressing mode" as "admode." If only certain admodes apply, they are listed in parentheses. Because the names of some admodes have commas in them, semicolons delimit lists of admodes. An instruction (e.g., ADC) may appear in more than one section.

These instructions do not care at all about the previous state of any flags when they run, and always take the same number of cycles:

  • NOP
  • WDM (because the instruction set was never expanded)
  • XBA
  • STP
  • REP (note that SEP is not here beside it!)
  • BRL
  • CLC
  • CLI
  • CLD
  • CLV
  • INC (accumulator admode)
  • INX
  • INY
  • DEX
  • DEY
  • PEA

This instruction keeps waiting until an interrupt happens:

  • WAI

These instructions use the stack pointer to know where to go:

  • RTS
  • RTL
  • RTI

When the e flag is being set, this instruction forces the m and x flags to 1:

  • XCE

When the e flag is set, these instruction take one extra cycle:

  • BCC
  • BCS
  • BEQ
  • BNE
  • BMI
  • BPL
  • BVC
  • BVS
  • BRA

When the e flag is clear, these instructions take one extra cycle:

  • BRK
  • COP
  • RTI

Note: I like to call the carry flag the borrow flag when doing subtraction - they are different names for exactly the same flag

When the carry flag is set, the sum is one greater:

  • ADC

When the borrow flag is clear, the difference is one fewer:

  • SBC

When the m flag is set, the following instructions transfer only one byte:

  • TXA
  • TYA

When the m flag is clear, the following instructions take two extra cycles:

  • INC (absolute; direct page; absolute indexed, X; Direct Page Indexed, X)
  • DEC (Absolute; direct page; absolute Indexed, X; Direct Page Indexed, X)
  • ASL (Absolute; Direct page; Absolute Indexed, X; Direct Page Indexed, X)
  • TRB (both Direct Page and Aboslute addressing)
  • TSB (both Direct Page and Absolute addressing)

When the m flag is clear, the following instructions take only one extra cycle:

  • ADC (all admodes)
  • LDA (all admodes)
  • ORA (all admodes)
  • STA (all admodes)
  • STZ (all admodes)
  • BIT (all admodes)
  • CMP (all admodes)
  • PLA
  • PHA

When the x flag is clear, the following instructions take one extra cycle:

  • PLX
  • PLY
  • PHX
  • PHY
  • STX (all admodes)
  • STY (all admodes)
  • LDX (all admodes)
  • LDY (all admodes)
  • CPX (all admodes)
  • CPY (all admodes)

This instruction moves the value of the carry bit into bit 0 of the accumulator:

  • ROL

This instruction moves the value of the carry bit into the most significant bit of the accumulator:

  • ROR

The following instructions take one extra cycle if the low byte of the direct page register is nonzero:

  • PEI (Stack (Direct Page Indirect))
  • ADC (Direct Page; Direct Page Indirect; Direct Page Indirect Long; Direct Page Indexed, X; Direct Page Indirect, X; Direct Page Indirect Indexed, Y; Direct Page Indirect Long Indexed, Y)
  • AND (Direct Page; Direct Page Indirect; Direct Page Indirect Long; Direct Page Indexed, X; Direct Page Indirect, X; Direct Page Indirect Indexed, Y; Direct Page Indirect Long Indexed, Y)
  • ASL (Direct Page; Direct Page Indexed, X)
  • BIT (Direct Page; Direct Page Indexed, X)
  • CMP (Direct Page; Direct Page Indirect; Direct Page Indirect Long; Direct Page Indexed, X; Direct Page Indirect, X; Direct Page Indexed, Y; Direct Page Indirect Long Indexed, Y)
  • CPX (Direct Page)
  • CPY (Direct Page)
  • DEC (Direct Page; Direct Page Indexed, X)
  • EOR (Direct Page; Direct Page Indirect; Direct Page Indirect Long; Direct Page Indexed, X; Direct Page Indirect, X; Direct Page Indirect Indexed Y; Direct Page Indirect Long Indexed, Y)
  • INC (Direct Page; Direct Page Indexed, X)
  • LDA (Direct Page; Direct Page Indirect; Direct Page Indirect Long; Direct Page Indexed, X; Direct Page Indirect, X; Direct Page Indexed, Y; Direct Page Indirect Long Indexed, Y)
  • LDX (Direct Page; Direct Page Indexed, Y)
  • LDY (Direct Page; Direct Page Indexed, X)
  • LSR (Direct Page; Direct Page Indexed, X)
  • ORA (Direct Page; Direct Page Indirect; Direct Page Indirect Long; Direct Page Indexed, X; Direct Page Indirect, X; Direct Page Indirect Indexed, Y; Direct Page Indirect Long Indexed, Y)
  • ROL (Direct Page; Direct Page Indexed, X)
  • ROR (Direct Page; Direct Page Indexed, X)
  • SBC (Direct Page; Direct Page Indirect; Direct Page Indirect Long; Direct Page Indexed, X; Direct Page Indirect, X; Direct Page Indirect Indexed, Y; Direct Page Indirect Long Indexed, Y)
  • STA (Direct Page; Direct Page Indirect; Direct Page Indirect Long; Direct Page Indexed, X; Direct Page Indirect, X; DP Indirect Indexed, Y, DP Indirect Long Indexed, Y)
  • STX (Direct Page; Direct Page Indexed, Y)
  • STY (Direct Page; Direct Page Indexed, X)
  • STZ (Direct Page; Direct Page Indexed, X)
  • TRB (Direct Page)
  • TSB (Direct Page)

When the x flag is being set, these instruction set the high byte of the index registers to 0:

  •   RTI (x is pulled from the stack)

  •   SEP (x is set in immediate value)

These instructions push a 16-bit value to the stack:

  •   PEA

  •   PEI

  •   PER

Written by jeffythedragonslayer