This wiki page will serve as an eratta for mistakes the superfamicom community has found in the offical SNES manual from Nintendo.

On page 3-2-2, the two's complement decimal representation of a BRR sample-point is -8 ~ 7, not -7 ~ +8.

On page C-10 (Book II), the EI and DI instructions have 1 and 0 in the Z spot of the "flags affected" field; they should be in the I spot.

On page 2-1-4 section 1.4, the word "flag" should be plural. There are two flags, each in the screen mode register (SCMR). The flag that controls Game Pak RAM access is bit 3 (RAN), and the flag that controls Game Pak ROM access is bit 4 (RON).

On page 3-7-4, Figure 3-7-1, the formula for Bent Line Mode is missing a negative sign in front of the exponent t.

In Figure 3-1-1 of Book 1, the System Block Diagram, "Stereo" is misspelled.

The SNES mouse left button is labeled the right actuator, and vice versa.

At the bottom of page 4-10-3 of book 2, D0 is used to refer to an entire 8-bit value but the diagram shows D0 is only bit 0 of that value.

Page 1-2-1 of book 2 states that the SA-1 is internally composed of 9 components, but 11 are shown in the block diagram. (The next page lists the 9.)

In Figure 3-1-1 of Book 2, the DSP1 chip connects to cartridge memory outside the cartridge. This is wrong.

In the confidentiality agreement in Book 1, there is a curly brace after "Letterhead" at the top, where there should be a closing square bracket.

The following registers described in Book 1 have blank names:

43X0H (X : channel number <0 ~ 7>)					Parameter for DMA Transfer							page 2-28-10
43X1H (X : channel number <0 ~ 7>)					B-Bus Address for DMA								page 2-28-11
43X2H / 43XH / 43X4H (X : channel number <0 ~ 7>)	Table address of A-Bus for DMA <A1 Table Address>	page 2-28-11
43X5H / 43X6H / 43X7H (X : channel number <0 ~ 7>)	Data Address Store By H-DMA & Number of Byte to be transferred Settings By General Purpose Dma		page 2-28-12
43X8H / 43X9H (X : channel number <0 ~ 7>)			Table Address of A-Bus By DMA <A2 Table Address>	page 2-28-13
43XAH (X : channel number <0 ~ 7>)					The Number of Lines to be Transferred By H-DMA		page 2-28-13

The top of page 4-3-4 of Book 2 mention five one-byte blocks, but then goes on to contradict itself by calling blocks 2,3, and 4 "bits"

On page iv, the list of Figures in Book 2, "Definition of One Bit" should be "Definition of One Byte" and is actually on page 4-3-3

On pages 2-24-4 and 2-24-7, the word "Enable" is misspelled "Ensble" in the controller read row

Page 3-1-1 of Book 1 claims that the SPC700 clock speed is 2.48 MHz - this should say 2.048 MHz

On pages 1-2-37 and 1-2-38 of Book 1 in the cartridge list legend, the exact same symbol (a hollow circle) is used to denote both "Now available" and "In development"

According to http://pikensoft.com/old/docs/Super_Famicomm_sound_manual_%28Ledi%29.txt, the blank space between 7FFFH and FFBFH on page 3-1-3 is actually used by several games.

On the gain parameters page of Book 1, "0 -> 0/10" appears to be going in the wrong direction as it is in the Decrease Mode Exponential column.

On page 2-1-2, the figure number in the text to refer to for the interlace explanation is wrong

On page 3-7-9, we have "The output of this register is the sum of main volume and echo volume with a sign bit" should say "these registers" as there is four of them.

On page D-1 (Book I), 12-bit values are shown being written to some 8-bit ports.

On page 2-9-2 of Book II in the Operation Functions table, the indicator e is 8-bit not 1-bit because it can take on a range of -128 to 127.